Centec Networks stands at the forefront of domestic substitution for high‑end Ethernet switch chips, with accelerating industry penetration and booming market demand for AI‑oriented scale‑up supernode interconnection solutions.
Investment Highlights
Centec Networks released its full‑year 2025 and Q1 2026 financial results. In 2025, the company achieved total operating revenue of RMB 1.15 billion, representing a year‑over‑year increase of 6.4%. Net profit attributable to parent shareholders reached negative RMB 150 million, down 119.7% year over year, while non‑recurring adjusted net profit stood at negative RMB 220 million, a year‑over‑year decline of 101.0%.
In Q1 2026, the company generated quarterly revenue of RMB 250 million, rising 11.4% year over year but declining 22.1% quarter over quarter. It recorded a net profit of negative RMB 20 million attributable to parent entities, reflecting a 12.1% year‑over‑year decrease and a substantial 89.3% quarter‑over‑quarter improvement. Non‑recurring adjusted net profit amounted to negative RMB 30 million, up 20.0% year over year and 83.8% sequentially.
As a leading domestic developer of Ethernet switch chips, Centec boasts comprehensive product portfolios for campus and data center scenarios, rivaling global leaders including Broadcom and Marvell. The company’s core offerings consist of Ethernet switch chips and supporting accessories. Leveraging self‑developed switching chips, it delivers customized chip modules and tailored switch system solutions for enterprise clients.
Centec’s Ethernet switch chips and modules are widely deployed across enterprise networks, carrier‑grade networks, data center infrastructure and industrial networking scenarios, supporting full Layer 2 forwarding, Layer 3 routing, visualized operation and secure interconnection capabilities. Its product speed spectrum covers port rates from 100Mbps to 800Gbps and switching capacities ranging from 100Gbps to 25.6Tbps.
The company’s TsingMa.MX series delivers a maximum switching capacity of 2.4Tbps with native 400G port support, enabling advanced next‑generation network communication features. Its GoldenGate series features 1.2Tbps switching capacity and 100G port compatibility, optimized for visualized networking and lossless transmission architectures. Targeting large‑scale data center and cloud computing demands, Centec has launched flagship 12.8Tbps and 25.6Tbps high‑end switch chips supporting up to 800G port rates.
Global Ethernet switch chips fall into two major categories: in‑house chips developed and deployed by equipment vendors such as Cisco, Huawei and ZTE, and commercial merchant chips supplied by specialized vendors including Broadcom, Marvell, Realtek and Centec. According to CIC Consulting, Centec ranks among the top domestic merchant Ethernet switch chip suppliers, capturing a 2.3% global market share for 10G+ commercial switch chips in 2020.
Driven by surging AI capital expenditure and accelerating adoption of domestic networking solutions, Centec’s high‑bandwidth data center Ethernet switch chips are poised for rapid revenue growth. Ethernet switches serve as core hardware components in AI data center infrastructure. According to Semianalysis, Spectrum X switches account for approximately 3.5% of total hardware costs within H100‑based superclusters. As the critical bill‑of‑materials component for Ethernet switching systems, high‑speed switch chips are experiencing explosive market expansion alongside AI infrastructure buildouts.
Lightcounting industry data projects the global Ethernet switch chip market and InfiniBand switch chip market to reach roughly USD 4 billion and USD 2 billion respectively in 2025. As Ethernet architecture emerges as the mainstream interconnection solution for AI data centers, the Ethernet switch chip market is expected to surpass USD 14 billion by 2030, with scale‑up dedicated switch chips alone projected to form a USD 18 billion market.
On the carrier front, China Mobile launched its first centralized procurement for RoCE switches in March 2026, covering 400G, 12.8T and 51.2T high‑end models. Domestically developed and controllable RoCE switches accounted for 73.2% of total procurement volume, including high‑end 51.2T switching devices. In the cloud sector, Alibaba Cloud unveiled a self‑developed 102.4T NPO switch in March 2026, integrated with four 25.6T domestic switch chips and adopting innovative NPO co‑packaged optics architecture to enable multi‑plane high‑speed networking.
Centec’s flagship 12.8T and 25.6T switch chips deliver competitive switching capacity and port performance comparable to international peers, supported by advanced architectural design that enables flexible cross‑process node migration. The company’s high‑end product lineup fully qualifies for large‑scale deployment in domestic cloud and carrier AI infrastructure projects.
Booming domestic supernode construction fuels robust demand for scale‑up switch chips, positioning Centec as a core participant in indigenous interconnection ecosystems such as OISA. Scale‑up supernode architecture represents a pivotal system‑level solution to break single‑node computing bottlenecks, optimizing total cost of ownership for AI training and inference workloads and enabling resource pooling and virtualization. Amid constrained advanced process node availability for domestic chips, system‑level performance enhancement via scale‑up clustering has become a dominant industry trend.
Scale‑up networking architectures include MESH, Torus and full interconnection topologies, with leading global AI ecosystems represented by NVIDIA NVLink adopting full switch‑chip interconnection frameworks. Current domestic scale‑up interconnection protocols cover PCIe, CXL, Glink, ETH‑X, SUE/ESUN, OISA and UALink. Among these, OISA is an indigenous, high‑efficiency open GPU interconnection architecture led by China Mobile. The OISA 1.0 protocol supports full‑mesh interconnection of up to 128 GPUs with 800GB/s bandwidth per node, enabled by eight 51.2T high‑end switch chips.
As one of the founding ecosystem partners of OISA, Centec has participated in formulating the official OISA protocol standards. Its next‑generation 51.2T high‑end switch chip is poised to become a core indigenous solution for domestic CSP supernode deployments across Ethernet‑based interconnection architectures.
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